1. Field of the Invention
The present invention relates to a liquid crystal device, and more particularly, to an impulse driving method and apparatus thereof for a liquid crystal device.
2. Description of Related Art
A liquid crystal display (LCD) is broadly used instead of a cathode radiation tube (CRT) in recent time. As semiconductor technology development advances, an LCD is superior in low power consumption, lightness in weight, high resolution, high hue saturation, prolonged lifetime, etc. Therefore, an LCD is broadly used in electronic products such as laptop computer, desktop computer and LCD television. Wherein the quality of a liquid crystal panel dominates the quality of the LCD.
Referring to FIG. 1, a conventional TFT LCD is shown. Wherein, a plurality of data lines 112˜118 is driven by the data driver 110 for outputting data signals of the driving pixels. A plurality of gate lines 132˜138 (i.e. scan lines) is driven by the gate driver 130. The display area 120 comprises a plurality of transistors 152˜168 and storage capacitors 181˜197.
A conventional operation of the impulse LCD comprises the steps of driving a gate line, e.g. gate line 132, for turning on all transistors 152˜156 along the gate line 132, and inputting pixel data signal via data lines 112˜118 for charging storage capacitors 181˜185. Next, a next gate line is driven, e.g. gate line 134, and pixel data signal to be displayed via data lines 112˜118 is inputted for driving storage capacitors 187˜191. Similarly, storage capacitors 181˜197 of the display area 120 are charged sequentially, and an entire image is displayed.
Obviously, the operation method is suitable for static image display, yet when displaying rapid dynamic images, image dragging may occur since storage capacitors are not being promptly charged/discharged. In order to eliminate image dragging, usually an impulse driving LCD is used for simulating operation mode of a cathode radiation tube for avoiding image dragging when displaying dynamic images.
Referring to FIG. 2, a time chart of operating a gate driver of a conventional LCD panel is shown. The operative timing is disclosed by Hitachi Co., wherein black insertion method is used for simulating pulse driving of a gate driver. In FIG. 2, STV represents a start vertical signal of the gate driver, CPV represents a gate clock signal of the gate driver, OE1, OE2 and OE3 respectively represent output enable signal of different drive IC of the gate driver, where OE2 and OE3 are not shown therein. GATE_OUT1, GATE_OUT2, GATE_OUT3 . . . and so on are scanning signals for driving gate lines outputted from the gate driver.
In FIG. 2, STV is triggered with two different enabling states within a scan period T of a frame under impulse driving mode. Accordingly, a scan signal of each of the gate lines is enabled twice, where the first pixel data signal is loaded from the storage capacitors for the first enable operation, whereas black data signal is loaded for black data insertion for the second enable operation. Therefore, the scan period T is divided into two intervals of T1 and T2. The gate clock signal CPV corresponds to output enable signals OE1, OE2 and OE3 for controlling the scan signals outputted from the driver ICs, which drive the gate lines.
During the first time interval T1, since a start vertical signal STV is activated for merely a clock period of the gate clock signal CPV, through the operation of the shift register in the gate driver, the gate lines GATE_OUT1, GATE_OUT2, GATE_OUT3 . . . are sequentially driven, and thus the pixel data outputted from the data driver is directed to the storage capacitors. Moreover, during the second time interval T2, since the start vertical signal STV maintains a period of four gate clock signals CPV, through the operation of the shift register in the gate driver, four gate lines are simultaneously driven, and thus the black data signals from the data driver are fed to the liquid crystal capacitor to clear the voltage of the pixel data signal charged on the liquid crystal capacitor. Impulse driving is thus implemented.
Obviously, the method mentioned above comprises providing different output enable signals OE1, OE2 and OE3 for enabling or disabling scan signals outputted from different driver ICs upon different driver IC structure of the gate driver. The gate lines GATE_OUT1, GATE_OUT2, GATE_OUT3 . . . in FIG. 2 are alternately driven for directing pixel data signal or black data signal outputted from the data driver to storage capacitors. For example, during the time interval T1, i.e. scan period of the pixel data signals, since the gate lines GATE_OUT1, GATE_OUT2, GATE_OUT3 . . . outputted from the driver ICs are controlled by the output enable signal OE1, when the output enable signal OE1 is at low voltage level, the output enable signals OE2 and OE3 have to be at high voltage level that disables the driver ICs. Whereas during the time interval T2, i.e. black data scan period, since the gate lines GATE_OUT1, GATE_OUT2, GATE_OUT3 . . . are controlled by the output enable signal OE1 is at low voltage level, the output enable signals OE2 and OE3 have to be at high voltage level that disables the driver ICs, yet width of the voltage levels vary. Therefore, the different driver ICs of this driving method are controlled respectively by the different output enable signals OE1, OE2 and OE3, and thus control signals are relatively complicated.
Furthermore, merely one start vertical signal STV is used for enabling or disabling scan signals corresponding to output enable signals OE1, OE2 and OE3 outputted from respective driver ICs, such that a time interval T1 is not smaller than T/m, where m is an amount of driver ICs that construct the gate driver. If T1 is assigned as smaller than T/m, a driver IC of the gate driver with merely one output enable signal line is difficult to reach need for enabling and disabling different gate lines at the same time. Consequently, black insertion ratio is significantly limited. For example, when an amount of the driver ICs of the gate driver is 2, the black insertion ratio may not be beyond 50%, whereas when an amount of the driver ICs is 3, the black insertion ratio may not be beyond 33%.